Abstract

There is an increasing need for power management systems that can be fully integrated in silicon to reduce cost and form factor in mobile applications, and provide point-of-load voltage regulation for high-performance digital systems. Switched-capacitor (SC) converters have shown promise in this regard due to relatively high energy-density of capacitors and favorable device utilization figures of merit. Resonant switched-capacitor (ReSC) converters show similar promise as they benefit from many of the same architectures and scaling trends, but also from ongoing improvements in mm-scale magnetic devices. In this study, we explore the design and optimization of 2:1 step-down topologies, based on representative capacitor technologies, CMOS device parameters, and air-core inductor models. We compare the SC approach to the ReSC approach in terms of efficiency and power density. Finally, a chip-scale ReSC converter is presented that can deliver over 4 W at 0.6 W/mm2 with 85% efficiency. The two-phase, nominally 2:1 converter supports input voltages from 3.6–6.0 V, and is implemented in 180-nm bulk CMOS with die-attached air-core solenoid inductors.

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