Resolution Analysis of Switching Converter Models for Hardware-in-the-Loop

Abstract

This work proposes two methods to determine the resolution of state variables in models of switching-mode power converters. The target models are intended for hardware-in-the-loop, i.e., closed-loop emulation using a model of the power converter implemented in digital hardware with the controller in its final implementation. The focus here is on the resolution of fixed-point models, although the results can also be applied to the significand resolution in floating-point representation. The first method is based on the simulation, provides the designer with the optimum resolution values, and guarantees that using the resolution, the converter will behave as it was specified. The second method is fast but conservative, intended for applications without hard constraints of area and speed. Despite the simplicity of the second method, its results, although slightly overestimated, have been demonstrated to be correct by the results of the first method. A boost converter for the power factor correction is used as an application example. As the converter model is intended for field-programmable gate array implementation, its area and maximum clock frequency are also analyzed. In this application example, the results show that the area grows linearly with the number of bits of each state variable, and the clock frequency is dominated by the width of one of the variables.