Abstract
In this paper a CMOS low noise amplifier is designed for radio ultra-wide band receivers. The design process includes; input matching network, cascoded structure, RC feedback loop, RL load and output matching network. The LNA is implemented in TSMC RF CMOS 0.18µm technology with minimum noise figure of 2.3dB, maximum gain (S <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</inf> ) of 15.1dB with gain flatness of 0.7, S <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">22</inf> <−15dB and IIP3 of − 10dBm at 3–5 GHZ bandwidth. The power dissipation is 11.4 mW while using 1.5V voltage supply.
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