Abstract

The via-first dual damascene process is the current manufacturing technology for copper/low-k interconnect fabrication. In the conventional via-first dual damascene process, metal trench patterning lithography is applied after filling the vias with sacrificial organic materials under the resist, such as gap fill materials and bottom antireflective coating. Resist poisoning has become a serious problem for the 65 nm technology node and beyond owing to the use of porous low-k dielectric materials. This study describes the newest method of evaluating resist poisoning. The dependence of film thickness on resist poisoning was observed, and the effects of the gap fill materials with different polymers were also clarified. One gap fill material was found to have an excellent resist poisoning blocking property as determined from the bias of trench patterning size between the center and edge areas. In addition, to evaluate the resist poisoning in lithography, a chemical approach using the developed gap fill materials can potentially allow the skipping of the additional thermal annealing process and achieve high throughput wafer processing by only coating the gap fill material on the substrates that generate resist poisoning. Continuing the via-first dual damascene process using porous low-k dielectric materials in an advanced lithography will be valuable in future studies based on this evaluation method, compared with the trench-first dual damascene process owing to the higher cost of the latter.

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