Abstract

In this paper, we propose two memoryless converters for the moduli set {22n+1 -1,22n,2n -1}. First, we propose a novel reverse converter, which is purely adder based, using the traditional Chinese Remainder Theorem (CRT). Second, due to the fact that the proposed CRT based structure does not cover the entire dynamic range, a second converter, which covers the entire dynamic range based on Mixed Radix Conversion (MRC), is proposed. The CRT based converter outperforms the MRC based converter both in terms of area and delay. In comparison with related best known state of the art converters, they are all outperformed by the proposed CRT based scheme in terms of both area cost and conversion delay. The theoretical evaluation is supported by the experimental results, which are estimated on a Standard Cell 0.13-µm CMOS technology. These experimental results indicate that, on average, for the same dynamic range, the proposed CRT based converter achieves about 23% delay reduction with more than 3% area reduction, when compared to the existing state of the art MRC based converter. Additionally, the proposed CRT based converter is about 6% faster with about 4% area reduction when compared with the existing CRT based converter.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.