Residue Signed-Digit Arithmetic and the Conversions between Residue and Binary Numbers for a Four-Moduli Set

Abstract

By introducing a signed-digit (SD) number arithmetic into a residue number system (RNS), arithmetic operations can be performed efficiently. In this paper, a high-speed modulo m SD addition algorithm is proposed, where m ∈ {2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> + 1, 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> +1, 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2n</sup> +1, 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> }. By using the modulo m SD adders, a modulo m SD multiplier can be implemented with a binary adder tree structure. We also present an algorithm for the conversion from residue SD numbers to SD numbers for the four-moduli set {2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> - 1, 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> + 1, 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2n</sup> + 1, 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> } which can be designed using a two-level binary tree structure of the residue SD number additions. The comparison of the new converter using SD number arithmetic with the converter using binary arithmetic yields reductions in delays of 44%, 60% and 75% for n=4, n=8 and n=16, respectively.