Reset: A Reconfigurable state encoding technique for FSM to achieve security and hardware optimality

Abstract

Digital controllers are prone to side-channel and fault-insertion attacks that lead hardware security as the primary issue in its creation. On the other hand, optimal hardware design is also the prime concern while crafting a digital controller. A finite state machine (FSM) presents a novel framework for any complex digital controller, and a state assignment technique is used for its optimization. In this article, a reconfigurable state encoding technique (ReSET) is proposed for FSM to obtain security and hardware optimality. ReSET is a deterministic method, which employs algorithms such as, (a) robust quadratic sum code based state assignment, and (b) gradient-based interior point approach based state assignment. A user-defined reconfiguration factor is introduced in ReSET by which the degree of security and hardware optimality is configured for the FSM. An extensive set of experiments are executed to validate the ReSET’s feasibility, which also proves ReSET’s superiority in terms of area, computation time, power, and error masking probabilities over the state-of-art literature. To the best of author’s knowledge, ReSET has made the first successful attempt to achieve security as well as hardware optimality for an FSM by setting the reconfiguration factor.