Abstract

The memory system is a fundamental performance and energy bottleneckin almost all computing systems. Recent system design, application,and technology trends that require more capacity, bandwidth,efficiency, and predictability out of the memory system make it aneven more important system bottleneck. At the same time, DRAMtechnology is experiencing difficult {\em technology scaling}challenges that make the maintenance and enhancement of its capacity,energy-efficiency, and reliability significantly more costly withconventional techniques.In this article, after describing the demands and challenges faced bythe memory system, we examine some promising research and designdirections to overcome challenges posed by memoryscaling. Specifically, we describe three major {\em new} researchchallenges and solution directions: 1) enabling new DRAMarchitectures, functions, interfaces, and better integration of theDRAM and the rest of the system (an approach we call {\em system-DRAM co-design}), 2) designing a memory system that employs emergingnon-volatile memory technologies and takes advantage of multipledifferent technologies (i.e., {\em hybrid memory systems}), 3)providing predictable performance and QoS to applications sharing thememory system (i.e., {\em QoS-aware memory systems}). We also brieflydescribe our ongoing related work in combating scaling challenges ofNAND flash memory.

Highlights

  • Main memory is a critical component of all computing systems, employed in server, embedded, desktop, mobile and sensor environments

  • We envision a DRAM Translation Layer (DTL), not unlike the Flash Translation Layer (FTL) of today in spirit, can enable better scaling of DRAM memory into the future by enabling easier error management and opening up new opportunities to perform computation, mapping and metadata management close to memory

  • Based on our experimental characterization results that show that the retention errors are the most dominant errors, we have developed a suite of techniques to mitigate the effects of such errors, called Flash Correct-and-Refresh (FCR) [21]

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Summary

Introduction

Main memory is a critical component of all computing systems, employed in server, embedded, desktop, mobile and sensor environments. Energy, cost, performance, and management algorithms must scale as we scale the size of the computing system in order to maintain performance growth and enable new applications. Such scaling has become difficult because recent trends in systems, applications, and technology greatly exacerbate the memory system bottleneck

Memory System Trends
Memory System Requirements
Solution Directions and Research Opportunities
New Research Challenge 1
Reducing Refresh Impact
Improving DRAM Reliability
Improving DRAM Parallelism
Reducing DRAM Latency and Energy
Exporting Bulk Data Operations to DRAM
Minimizing Memory Capacity and Bandwidth Waste
Co-Designing DRAM Controllers and Processor-Side Resources
New Research Challenge 2
Hybrid Main Memory
Making Non-volatile Main Memory Reliable and Secure
Merging of Memory and Storage
New Research Challenge 3
Mitigating Interference
Smart Resources
Dumb Resources
Integrated Approaches to QoS and Resource Management
Quantifying and Controlling Interference
Actual
Flash Memory Scaling Challenges
Findings
Conclusion
Full Text
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