Abstract
This paper introduces the performance metric of DSP parallel processing system and presents a model of coarse-grained speedup of DSP parallel processing structure. Quantitative research is done according to the system performance index and target program features. This study simulates and analyzes different communication protocols and different influences of different degrees of parallelism on the parallel processing structure performances. Optimization direction of parallel processing system is put forward.
Full Text 
Sign-in/Register to access full text options
Sign-in/Register to access full text options 
Published version (
Free)
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
