Research on the Influence of Phase Locked Loop Nonlinearity on Impedance Measurement for Stability Analysis

Abstract

Impedance measurement is an effective and flexible technique to obtain the impedance model of power electronic devices (PED). The impedance model can be applied to implement small-signal stability analysis. Hence, the accuracy of the impedance model is essential to acquire accurate stability analysis results. Perturbation injection is widely used to excite the devices under test (DUT), and then according to the current and voltage components at the terminal of the PED with the injected frequencies, the impedance at the perturbation frequencies can be calculated. Note that impedance model is a kind of linear small-signal model, which is established based on the harmonic linearization. Therefore, in impedance measurement, it is necessary to ensure the linearization condition of the measured system as much as possible. However, the injected perturbation may arouse the nonlinearity of the real system more or less, which may interfere the impedance measurement. In view of this issue, this paper investigates the nonlinearity of phase locked loop (PLL) and the influence of PLL nonlinearity on the measurement accuracy. Based on the investigation, a simple proposal on the frequency design for the perturbation signal is proposed so as to minimize the negative impact of PLL nonlinearity.