Research on fault injection technology for embedded software based on JTAG interface

Abstract

Fault injection is an effective method for PHM and testability validation. However, with the increasing complexity of structures and functions, and with the promotion of integration levels for airborne prognostics and health management (PHM) and integrated modular avionics (IMA) systems, fault injection is often difficult to use in conventional “plug,” “probe,” or “adaptor plate” methods. Fault injection based on software also presents a bottleneck for engineering applications in terms of controllability and operability. Seeking to solve the problem of applying software fault injection to testability validation, a fault injection technique based on the Joint Test Action Group (JTAG) interface is proposed in this study. The proposed technique is based on the demands of testability validation, takes into account the development trend in avionics of modularization and integration, and adopts aspects of the JTAG boundary-scan technique. Through use of the boundary-scan technique and chip debugging functions, noncontacted hardware fault injection can be realized. Accurate and controllable fault injection of embedded chip pins/functions can then be achieved that satisfies the requirements of fault simulation and injection effect/time. The problems of fault injection implementations for equipment-oriented IMA architecture can thus be overcome, and a new direction for implementing testability validation of airborne PHM and integrated avionics equipment, thereby effectively promoting and ensuring the achievement of testability indices and PHM functions.