Research on Defect Inspection Technology for Bump Height in Wafer-Level Packaging Based on the Triangulation Method

Abstract

With the advent of the era of big data and the vigorous development of consumer electronics, the demand for higher-speed processing capacity for gigantic amounts of data is increasing; this requires finer and far more numerous connections between dies as an essential component for connection and electronic communication between layers. The coplanarity of the height of micro bumps is crucial to ensure the reliability of the chip. The triangulation method has been widely used in various types of visual inspection applications over the past several years due to its high measurement accuracy and fast detection speed. In this paper, the application of triangulation technology is analyzed and used in micro bump height measurement. The measurement system proposed consists of a delicate design, a linearly arranged light projection module and a high-quality imaging module. Along the light stripe, multiple-height data of micro bumps are collected in a frame, and the full-field measurement is realized as the wafer is driven by the high-precision motional stage, following the optimal measurement route planned previously. In the scanning process, the images of the light strip projected on the top and bottom of the micro bumps are simultaneously acquired by the sophisticated micro vision system, and then the heights of micro bumps are calculated from a simple formula based on the geometry of the specimen and the system configuration. The experimental results demonstrate that the measuring deviation of the micro bump height has an accuracy of 1.5 μm.