Research on address calibration technology for ternary optical computer decoder

Abstract

In order to cope with the physical bottleneck of the development of electronic computers, the development of various new computers has attracted extensive attention. Ternary Optical Computer (TOC) is unique in the development of optical computer, from principle to experiment, then to algorithm and application. At present, decoding is the main problem faced by TOC. Aiming at the problem of decoding for TOC, an address calibration technique is designed and implemented in this paper, including address calibration strategy, field parallelism detection, solving separator line algorithm. Contrast to photonic crystals, which can decode logic 0 and 1, our decoder can recognize three logic values, 0, 1 and u. Since 3 is closer to the natural constant e than 2, and e-nary has the highest coding efficiency, our 3-valued encoding and decoding is more efficient. Finally, through the experiment on the TOC prototype SD16, the effectiveness of the decoder address calibration technology is verified. The address calibration technique lays a foundation for further promoting the development of TOC.