Abstract
In recent years, with the continuous upgrading of the chip manufacturing industry, the requirements of circuit design are not only to complete more and more complex signal conditioning tasks, but also to put forward higher requirements for performance delay and other aspects. This paper designs a 4-bit Absolute-Value Detector circuit and uses half-adder to realize signal conversion. In my circuits, when V dd is 1v, the critical path delay is 63.04 FO4(1V), and the total energy is 186.97 EU(1V). This also provides a solution for circuits that pursue low power consumption and low latency.
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