Abstract
Dynamic thermal management techniques employ a set of on-chip thermal sensors to measure runtime thermal behavior of microprocessors so as to prevent the on-set of high temperatures. Therefore, effective analysis of thermal behavior and determination of the best allocation and placement of thermal sensors directly impact the effectiveness of the dynamic thermal management mechanisms. In this paper, we propose systematic and effective techniques for determining the fewest number of thermal sensors and the optimal locations based on dual clustering to provide a high fidelity thermal monitoring. Initially, we utilize the dual clustering algorithm to devise method that can reduce the number of sensors to a great extent while satisfying an expected accuracy. Then we identify an optimal physical location for each sensor such that the sensor’s attraction towards steep thermal gradient is maximized. Experimental results indicate the superiority of our techniques and confirm that our proposed methods are capable of creating a sensor distribution for a given microprocessor architecture using the number of thermal sensors of 2, 8, 15, 24, 35, depending on different expected hot spot temperature error accuracy of 5%, 4%, 3%, 2%, 1%, respectively.
Highlights
Large-scale circuit integration and exponentially increasing power densities have resulted in high temperature in current microprocessors
In Proposed Thermal Sensor Allocation and Placement Techniques section we provide an overview of our methodology, where we introduce the thermal gradient calculation method in Thermal Gradient Calculation section and propose effective technique for thermal sensor allocation based on the dual clustering algorithm in Sensor Allocation Scheme section, and in Sensor Placement Strategies section we identify an optimal strategy for thermal sensor placement
Given a maximum allowable hot spot temperature error accuracy: for our proposed thermal sensor allocation and placement techniques, we determine the number of integrated cluster and each integrated cluster will be allocated one sensor; for improved k-means clustering technique (Memik et al 2008), we iteratively perform the improved k-means clustering algorithm until the maximum hot spot estimation error is less than the given allowable hot spot temperature error
Summary
Large-scale circuit integration and exponentially increasing power densities have resulted in high temperature in current microprocessors. Elevated chip temperature slows down transistor speed and increases interconnect delays (Brooks et al 2007). The results of these trends are timing failures and thermal runaway (Lin & Banerjee 2008). Effective assessment and analysis of the thermal behavior of microprocessors have become a major issue to be considered. The problem of temperatures on chips has been solved by employing dynamic thermal management techniques (Jayaseelan & Mitra 2009) which use a set of on-chip thermal sensors that continuously monitor temperatures at a few selected die locations during the runtime.
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
