Abstract
In common video compression coding technology, data with changing bit rate is not suitable for transmission in fixed bit rate channel. A bit rate control algorithm and a hardware design suitable for AVS decoder are proposed in this paper. The target bits are calculated and allocated in three levels, including GOP, frame and MB. The proposed hardware design passes the simulation verification. The result of synthesis in DC proves that the design meets timing requirements. The design is easy to realize and suitable for controlling the bit rate in real-time encoding.
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