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Abstract
Simulations of the electrical behavior of MOS-SOI devices pose a difficult numerical problem due to the floating substrate region. The numerical analysis techniques required to solve the floating region problem are discussed. Models for the carrier mobilities and lifetime variation with depth into the silicon film are introduced to fit measured SOS device data. The current-voltage characteristics of SOS transistors, including the kink, are accurately simulated and compared to measurements. The floating potential variation with applied gate and drain bias predicted by the simulation is discussed. >
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