Abstract
In this paper, a new approach to repairability/unrepairability detection for VLSI memory chips with redundancy is presented. An heuristic, yet efficient approach, is proposed. New conditions for detection are presented and fully analysed. These are based on a more accurate estimation of the regions of repairability and unrepairability. The main benefit of this approach is its practicality with respect to fast execution time and the improved ability to diagnose a VLSI redundant memory before the generation of the repair-solution. A new repair algorithm which utilizes a ternary tree approach is also presented.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: IEE Proceedings E Computers and Digital Techniques
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
