Abstract
Domain-Specific In-Memory Logic Gates As the total amount of data in computation rapidly increases, in-memory logic gates gain great attraction to address the von-Neumann bottleneck problem. In article number 2100267, Cheol Seong Hwang and co-workers present a new type of in-memory logic gates with a low voltage-stress level to execute exclusive-OR logic operations. The proposed logic gates have high compatibility with other logic gates in a crossbar array, which is utilized to implement a full adder-subtractor and multiplier. [Correction added on May 26, 2022, after first online publication: the inside back cover image and description were changed.]
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