Reliable adder and multipliers in QCA technology

Abstract

Quantum-dot cellular automata (QCA) nanotechnology is an interesting circuit design technology which is based on coulombic repulsion and majority logic (ML). Reliability is a key issue in QCA circuits. In this work, an adder is proposed with better fault tolerance and reduced complexity by combining three-input ML and five-input ML gates. The proposed design is realized by using the clock zone approach. Hence, the proposed design deploys only normal cells for its realization. This makes the proposed design less vulnerable to fabrication faults. This is validated by performing extensive fabrication defect analysis. A novel expression to compute the circuit complexity is also proposed. The proposed adder is used to realize a reliable array and serial multiplier. The proposed multipliers consume almost 55% less energy compared to the existing designs. The proposed adder can be used in any circuit at the basic elements.