Abstract
The experimental time-dependent dielectric breakdown and ON voltage reliability of advanced FD-SOI Z2-FET memory cells are characterized for the first time. The front-gate stress time is shown to significantly modulate the ON voltage and, hence, the memory window. The Weibull slope, $\beta $ , indicating the device variability to breakdown, and the time to soft breakdown, $\alpha $ , present different trends depending on the cell geometry. This fact highlights the tradeoff between variability and reliability to account for in Z2-FET designs.
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