Reliability Enhancement of a Power Semiconductor With Optimized Solder Layer Thickness

Abstract

This article deals with the reliability of a power semiconductor exposing to the severe thermal stresses. The importance of solder joint thickness on the power semiconductor's useful lifetime is demonstrated in this article. Solder layer thickness has knock on effects both on the creep accumulated strain and thermal characteristics of the power semiconductors. Since, these effects are in contradictory of each other, a trade-off seems to be essential to optimize the solder layer thickness. Thereby, thermo-mechanical behavior of a discrete power semiconductor under the thermal mission profile was simulated and the results were integrated to the actual conditions. The simulation results reveal that after thermal cycling, some creep strain is produced in the solder layer especially at the corners. The thinner the solder joint was, the greater accumulated creep strain was observed leading to the faster degradation. On the contrary, the thicker the solder layer was, the larger thermal resistance was observed leading to the higher junction temperature. Accordingly, the article is concentrated on optimizing the solder layer thickness based on these two issues. The scanning electron microscope micrographs, the EDS maps and X-ray diffraction analysis were also taken to indicate the solder layer thickness effects on the number of voids and their propagations in the different solder layer thicknesses. The experimental tests validate the expected results in the extracted simulations.