Reliability Considerations for Advanced and Integrated LED Systems

Abstract

This chapter presents an overview of advanced packaging and integration of solid state lighting (SSL) systems. A full realization of wafer level SSL system integration requires wafer level phosphor coating, wafer level LED chip encapsulation, wafer level optics manufacturing, the application of through silicon vias (TSV) between LED and silicon/ceramics/polymer wafers, the application of wafer-to-wafer or wafer-to-chip bonding and stacking, and the adoption of wafer level bumping technologies. Advances in reconfiguration (or reconstitution) of LED/silicon wafers are described in this chapter. Different technologies in TSV formation and various wafer-to-wafer or wafer-to-chip bonding technologies are illustrated. The finite element modeling of TSV process, essentially a chemical etching and subsequent passivation process, is discussed. A variety of wafer level bumping technologies is introduced, such as ball on I/O (BON), ball on polymer (BOP), redistribution dielectric layer (RDL) process, and copper post bumping process. The reliability improvement among different bumping technologies and the implications in SSL systems are presented. Newly developed polymer-core interconnect technology and nanocolumn interconnect are discussed.