Reliability Characterization of Gallium Nitride MIS-HEMT Based Cascode Devices for Power Electronic Applications

Surya Elangovan,Edward Yi Chang,Stone Cheng

doi:10.3390/en13102628

Abstract

We present a detailed study of dynamic switching instability and static reliability of a Gallium Nitride (GaN) Metal-Insulator-Semiconductor High-Electron-Mobility-Transistor (MIS-HEMT) based cascode switch under off-state (negative bias) Gate bias stress (VGS, OFF). We have investigated drain channel current (IDS, Max) collapse/degradation and turn-on and rise-time (tR) delay, on-state resistance (RDS-ON) and maximum transconductance (Gm, max) degradation and threshold voltage (VTH) shift for pulsed and prolonged off-state gate bias stress VGS, OFF. We have found that as stress voltage magnitude and stress duration increases, similarly IDS, Max and RDS-ON degradation, VTH shift and turn-on/rise time (tR) delay, and Gm, max degradation increases. In a pulsed off-state VGS, OFF stress experiment, the device instabilities and degradation with electron trapping effects are studied through two regimes of stress voltages. Under low stress, VTH shift, IDS collapse, RDS-ON degradation has very minimal changes, which is a result of a recoverable surface state trapping effect. For high-stress voltages, there is an increased and permanent VTH shift and high IDS, Max and RDS-ON degradation in pulsed VGS, Stress and increased rise-time and turn-on delay. In addition to this, a positive VTH shift and Gm, max degradation were observed in prolonged stress experiments for selected high-stress voltages, which is consistent with interface state generation. These findings provide a path to understand the failure mechanisms under room temperature and also to accelerate the developments of emerging GaN cascode technologies.

Highlights

Gallium Nitride (GaN) power devices play a vital role in power conversion applications [1,2,3], achieving extraordinary capabilities in photonics and semiconductor technology
Our study shows behaviors on two regimes of IDS, Max degradation, turn-on delay, negative
We identified two different mechanisms that are responsible for different off-state VGS, OFF stress bias experiments in GaN MIS-HEMT based cascode power switches

Summary

Introduction

Gallium Nitride (GaN) power devices play a vital role in power conversion applications [1,2,3], achieving extraordinary capabilities in photonics and semiconductor technology. Compared to other GaN power devices, the recent understanding of prolonged off-state gate bias stress effects on the GaN based cascode power switch is very limited This is mainly due to the configuration structure and multi-layered gate stack with multiple interfaces, which presents more chances for its electron tapping effects. The results of trapping processes described below indicate that: (i) in pulsed off-state bias the surface trapping may constitute a relevant parasitic mechanism that continuously limits dynamic performance of the switch; (ii) in prolonged off-state gate stress bias, the oxide-related trapping and interface state generation may constitute a relevant threshold voltage (VTH ) shift, transconductance (Gm, max ) degradation, and rise-time (tR ) delay increase, with increasing stress voltage magnitude and stress time evolution at room temperature. The major issue in the presence of electronic traps in the GaN power switch structure limits performance continuously

Experimental Details

Results and Discussion

Prolonged Off-State Gate Bias Stress

Conclusions