Reliability-aware design of Integrate-and-Fire silicon neurons

Abstract

Variation in CMOS device parameters due to reliability issues like Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI), etc., has posed serious performance concerns in various digital and analog/mixed-signal circuit designs, which include neuromorphic circuits. CMOS-based neuromorphic circuits, also known as silicon neurons (SiNs), are designed to emulate the electrophysiological behavior of biological neurons. Neuromorphic systems are used to learn and adapt in various applications like image processing and classification, wearable/implantable systems, robotics, etc. that require high performance. It is therefore, important to analyze neuromorphic circuits performance over their lifetime. This is achieved by identifying the specific transistors affecting circuit performance and to come up with workable ways to solve these problems. In this work, we have investigated the combined effect of NBTI and HCI on two types of Integrate-and-Fire (I&F) SiNs, Axon-Hillock (AH) and Simplified Leaky Integrate-and-Fire (SLIF) circuits, using key performance parameters. Novel reliability-aware AH and SLIF circuits are proposed to mitigate the reliability issues. The proposed reliability-aware designs show negligible deviations in the performance parameters after degradation. The time-zero process variability analysis is also carried out for the proposed reliability-aware SiNs. The power consumption of existing and proposed reliability-aware neuron circuits is analyzed and compared.