Abstract
The Vienna Development Method (VDM) is a formal method that supports modeling and analysis of software systems at various levels of abstractions. For a model specified by the VDM specification language (VDM-SL), the correctness of the model relies on discharging the proof obligations (POs), especially in the case of implicit specifications. In this paper, we propose an approach that encodes and discharges POs of VDM-SL models using SMT solvers. More specifically, POs generated by the Overture tool are encoded and discharged in the Z3 SMT solver. Our case studies showed that the approach can discharge significant part of proof obligations of a VDM-SL model efficiently.
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