Abstract
As integrated circuit technology advancements are pushing data rates to 6 Gb/s and beyond, channel simulations are becoming a necessity. As part of the topology modeling and simulation, the correct value of permittivity surrounding a printed circuit board (PCB) via hole structure is required for better accuracy. This paper presents data to suggest the relative permittivity of the dielectric surrounding a PCB via hole structure in the z-axis direction of a fiberglass reinforced PCB laminate is different from the relative permittivity surrounding a trace etch in the x/y-axis direction of the same PCB.
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