Abstract
This paper presents the results obtained with a specific test mask designed at Motorola for the study of the electromagnetic parasitic emissions in integrated circuits (IC). First, origins of parasitic emissions are presented for CMOS circuits, and electromagnetic compatibility (EMC) measurements of IC emissions are detailed: a radiated measurement method with respect to the IEC61967-2 standard and a conducted one with respect to the IEC61967-4 standard. The REGINA test chip is then described, with a focus on particular structures allowing to test and verify some design guidelines for EMC, like delay cell, emissive structure or on-chip sensor. The printed circuit board that is use to implement the test chip and the experiment test bench are also described. A set of measurements is presented and some guidelines are deduced and recommended as design rules.
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