Abstract
Certain physical CMOS defects cause changes in the quiescent current. To achieve high reliability, this current must be monitored either on- or off-chip. A built-in current sensor which monitors the Vdd line and is set up in a differential configuration is presented. Owing to its inherent properties, the regeneration time of the cross coupled latch of the sensor becomes the defect metric. This allows the sensor to have speed and functionality enhancements over previous BICS designs.
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