Re-evaluation mode timing simulation

Abstract

The authors describe a computationally inexpensive technique for evaluating different process conditions on a circuit's timing response. Due to manufacturing variations, the propagation of signals through a given path in a circuit is characterized by a statistical distribution. The Monte Carlo method requires the execution of multiple simulation runs of the same input pattern with different process conditions. The authors developed a technique called reevaluation mode simulation which can handle a wider range of process conditions since logic behavior is considered. Techniques for inexpensively evaluating the effects of different process conditions on circuit path delays have not considered the logic behavior. Consequently, the range of process conditions accommodated by these techniques is unnecessarily limited. It is this accounting for logic behavior that distinguishes this technique from the earlier work. The execution speed advantage of the technique over that of a conventional simulation stems from utilizing the information generated by the conventional simulation step. >