Reduction of the potential energy barrier and resistance at wafer-bonded n-GaAs/n-GaAs interfaces by sulfur passivation

Abstract

Sulfur passivation and subsequent wafer-bonding treatments are demonstrated for III–V semiconductor applications using GaAs–GaAs direct wafer-bonded structures. Two different sulfur passivation processes are addressed. A dry sulfur passivation method that utilizes elemental sulfur vapor activated by ultraviolet light in vacuum is compared with aqueous sulfide and native-oxide-etch treatments. The electrical conductivity across a sulfur-treated 400 - °C-bonded n-GaAs/n-GaAs interface significantly increased with a short anneal (1–2 min) at elevated temperatures (500–600 °C). Interfaces treated with the NH4OH oxide etch, on the other hand, exhibited only mild improvement in accordance with previously published studies in this area. TEM and STEM images revealed similar interfacial microstructure changes with annealing for both sulfur-treated and NH4OH interfaces, whereby some areas have direct semiconductor–semiconductor contact without any interfacial layer. Fitting the observed temperature dependence of zero-bias conductance using a model for tunneling through a grain boundary reveals that the addition of sulfur at the interface lowered the interfacial energy barrier by 0.2 eV. The interface resistance for these sulfur-treated structures is 0.03 Ω·cm at room temperature. These results emphasize that sulfur-passivation techniques reduce interface states that otherwise limit the implementation of wafer bonding for high-efficiency solar cells and other devices.