Reduction of switching frequency using reference phase disposition PWM technique in multilevel H-bridge inverters

Abstract

Cascaded H-bridge multilevel inverter topology is one of the most popular topologies in high voltage applications. This topology uses multiple units of H-bridge power cells connected in series chain to produce AC voltage. Multilevel inverters have other topologies that can be used according to condition and demand. Pulse width modulation is a popular method to control Cascaded H-bridge inverters. This method has some disadvantages such as high power dissipation in switches when the switching frequency is high. In this paper a method called reference voltage phase disposition PWM is presented which can reduce the switching frequency. A 5 level cascaded H-bridge inverter is simulated using Matlab/Simulink and the waveforms are analyzed to illustrate effectiveness of this method. The simulation results show that without any significant changes in harmonic content, switches are relaxed and switching losses though reduced.