Abstract

An SF6/CF4 cyclic reactive-ion etching (RIE) method is proposed to suppress the surface roughness and to optimize the morphology of Ge fin, aiming at the fabrication of superior Ge FinFETs for future CMOS technologies. The surface roughness of the Ge after RIE can be sufficiently reduced by introducing SF6-O2 etching steps into the CF4-O2 etching process, while maintaining a relatively large ratio of vertical etching over horizontal etching of the Ge. As a result, an optimized rms roughness of 0.9nm is achieved for Ge surfaces after the SF6/CF4 cyclic etching with a ratio of greater than four for vertical etching over horizontal etching of the Ge, by using a proportion of 60% for SF6-O2 etching steps.

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