Reduction of Power Consumption in Norflash Memory Based Wearable Electronics with Improved LRU Algorithm

Abstract

Norflash storage is a very important memory module for the practical application in the smart wearable electronics. For the versatility and complexity of its functional applications, it is highly demanded to build Norflash flash devices in the system. The Norflash memory devices have advantages in terms of the fast transmission speed, small volume, and good stability, when the algorithm calls the storage module to record the data and read user inquired storage data. Each startup of access in the storage module will cause a lot of power consumption. The improved Least Recently Used (LRU) algorithm is implemented to the Norflash memory device of the intelligent wearable electronics in order to reduce the power consumption in this work. The type M29F010B of ST’s chips is used for this investigation. The interface design method of the chip is analyzed in details. This approach reduces the number of accesses in the wearable electronics devices while reading from the recorded Norflash pages in the memory, comparing with the ordinary storage methods under the original operations. It shows that the improved LRU algorithm could effectively reduce the system power consumption and therefore to enhance the battery efficiency up to 8.8%.