Abstract
An combined approach for reducing the errors in the notch frequency fz, in the pole frequency fp, in the quality factor Qp and in the amplitude Hp at the pole frequency of switched-capacitor low-pass notch biquads is presented. At first, the conventional integrators in the biquads are replaced with gain and offset-compensated integrators. Subsequently, the errors Dfz/ fz, Dfp fp, DQp/Qp and DHp/Hp are minimized by modifying the values of the integrating capacitances and of the appropriately chosen zero-forming and pole-forming capacitances. The effectiveness of this approach is demonstrated by designing two low-pass notch biquad topologies which realize the same transfer function.
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More From: Facta universitatis - series: Electronics and Energetics
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