Abstract

We found that post-oxidation Ar annealing at high temperature is effective in reducing the interface state density (Dit) near the conduction band edge (EC) of SiC (0001) MOS structures. The Dit reduction effect is comparable to that of nitridation process (annealing in nitric oxide (NO)) which has been a standard in SiC MOS technologies, without introducing any foreign atoms into the interface/oxide. The generation of fast interface states, which have been pointed out as a problem of nitridation process, is suppressed in the case of Ar annealing. In the proposed method, the final Dit values are mainly determined by the Ar annealing temperature rather than the initial oxidation temperature. The Dit values are not sensitive to the cooling speed, which means that rapid cooling is not necessary in the proposed method.

Highlights

  • Reduction of interface state density in Silicon Carbide (SiC) (0001) MOS structures by post-oxidation Ar annealing at high temperature

  • SiC metal-oxide-semiconductor field effect transistors (MOSFETs) are expected to exceed the Silicon (Si)-based power devices operating at relatively high voltages (0.6 -10 kV), in terms of on-state resistance, breakdown voltage, and switching loss

  • Interface nitridation (annealing in nitric oxide (NO6–10)) and POCl3 annealing are effective both in reducing the Dit and in improving the channel mobility of MOSFETs. These methods are based on incorporation of foreign atoms into the interface, and there remains a concern about the extrinsic defect generation and the degradation of oxide’s reliability

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Summary

Introduction

Reduction of interface state density in SiC (0001) MOS structures by post-oxidation Ar annealing at high temperature. Takuma Kobayashi,a Jun Suda, and Tsunenobu Kimoto Department of Electronic Science and Engineering, Kyoto University, Katsura, Nishikyo, Kyoto 615-8510, Japan (Received 11 January 2017; accepted 29 March 2017; published online 12 April 2017)

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