Reducing Transaction Processing Latency in Hardware Transactional Memory-based Database with Non-volatile Memory

Abstract

PDF HTML XML Export Cite reminder Reducing Transaction Processing Latency in Hardware Transactional Memory-based Database with Non-volatile Memory DOI: 10.21655/ijsi.1673-7288.00274 Author: Affiliation: Clc Number: Fund Project: National Key Research and Development Program of China (2020YFB2104100); National Science Fund for Distinguished Young Scholars of China (61925206) Article | Figures | Metrics | Reference | Related | Cited by | Materials | Comments Abstract:The emergency of Hardware Transactional Memory (HTM) has greatly boosted the transaction processing performance in in-memory databases. However, the group commit protocol, aiming at reducing the impact from slow storage devices, leads to high transaction commit latency. Non-Volatile Memory (NVM) opens opportunities for reducing transaction commit latency. However, HTM cannot cooperate with NVM together: flushing data to NVM will always cause HTM to abort. In this paper, we propose a technique called parity version to decouple the process of HTM execution and NVM write. Thus, the transactions can correctly and efficiently use NVM to reduce their commit latency with HTM. We have integrated this technique into DBX, a state-of-the-art HTM-based database, and propose DBXN: a low-latency and high-throughput in-memory transaction processing system. Evaluations using typical OLTP workloads including TPC-C show that it has 99% lower latency and 2.1 times higher throughput than DBX. Reference Related Cited by