Abstract
Cache misses and insufficient instruction-level parallelism (ILP) in a single program make functional units of VLIW (very long instruction word) processor underused. Simultaneous multithreading (SMT) technology is one of the best choices to improve the utilization of functional units in processors, since it can convert thread-level parallelism (TLP) to ILP. Previous work investigate how to incorporate SMT technology with VLIW processors, but none of them reveals further what prevents SMT VLIW processors from achieving higher throughput. In addition, those methods that enhance throughputs for SMT superscalar processors are unsuitable for VLIW processors. In this paper, we propose an approach, which reduces conflicts among threads with moderate hardware costs, to improve the utilization of functional units. Experimental results show that our approach can effectively increase throughputs of SMT VLIW processors.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
