Abstract

For the last few years, multilevel inverters (MLI) have become much attention because of high power quality and flexibility in modulation techniques. But with the increase of number of levels it has huge number of device counts. To address this drawback this paper reports two types of reduced switch cascaded multilevel inverters (CMLI) by using symmetrical and asymmetrical DC sources. In the design of CMLI, harmonic mitigation techniques are applied by using offline calculation of switching angles and then switching pulses are generated. The proposed 11 and 31 level inverter can produce better quality of output waveform with less THD value that have been verified by using proper simulation technique and Hardware in Loop (HIL) environment.

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