Abstract
Generally, the small-signal model (SSM) of a modular multilevel converter (MMC) needs to consider the dynamics of equivalent arm capacitors, which inevitably increases the model order. In view of this, this paper proposes a general order-reducing approach based on balanced realization theory to reduce the SSM order of the MMC. In particular, two reduced-order models of an MMC-based HVdc grid are proposed with respect to different research objectives. To determine the potential minimum order of single MMC or MMC-HVdc grid, the criteria including singular values (SVs) of the frequency response, dynamic response in the time domain, and the largest absolute error of SVs are fully investigated. The simulation results of a four-terminal MMC-HVdc grid show that reduced-order models of the MMC and the HVdc grid can precisely predict both the stability and instability while the dynamic characteristics are retained.
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