Abstract

In this paper, we propose a reduced complexity (RC) per-survivor-processing (RC-PSP) iterative timing recovery scheme. The objective is to lessen the computational burden while approaching the optimal system performance of the existing full-complexity (FC) log-MAP (FC-PSP) iterative recovery scheme. This is achieved by utilising the max-log-MAP framework, which converts the multiplications and additions to maximum operations. According to Spasov, Gushev and Ristov, such framework consumes less power, reduces space on a chip and increases decoding speed. Robertson et al. showed that max-log-MAP PSP requires only 5 × 2M − 2 max operations, 10 × 2M additions and 8 multiplications by ±1. Furthermore, it offers a direct mathematical framework for converting the log-MAP-based PSP to max-log-MAP-based PSP for timing recovery. The simulations show that the proposed method outperforms the previous methods. The computational complexity for the max-log-MAP PSP is significantly reduced at the cost of a small bit error rate (BER) performance loss.

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