Reduced Asymmetric Memory Window Between Si-Based n- and p-FeFETs With Scaled Ferroelectric HfZrOₓ and AlON Interfacial Layer

Abstract

The Si-based n- and p-FeFET with 5-nm ferroelectric (FE) HfZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> (HZO) and high-k AlON interfacial layer (IL) were fabricated for the comparison of memory characteristics and reliability. The memory window (MW) of 1.37 V and 1.25 V are obtained by the n- and p-FeFET respectively by applying pulses of ±3.8 V/ 50 μ s. The typical MW asymmetry for both types of FeFETs is significantly reduced which is attributed to the reduced remanent polarization ( P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">r</sub> ) from the highly scaled HZO and the enhanced voltage drop across the HZO as well as the improved interfacial quality from the AlON IL. In addition, the p-FeFET demonstrates a MW of 1.02 V up to $10^{{5}}$ cycles with a long pulse 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-4</sup> s, superior to that of the n-FeFET due to the mitigated hot-electrons induced hole generation. Furthermore, the p-FeFET shows comparable retention performance with the n-FeFET. These results indicate that the p-FeFET possesses the competence of future memory applications without adding process complexity and introducing new substrate material.