Abstract

In this project, we have developed the use of thin-film magnetic materials to improve in energy efficiency of digital computing applications by enabling integrated dc-dc power conversion and management with on-chip power inductors. Integrated voltage regulators also enables fine-grained power management, by providing dynamic scaling of the supply voltage in concert with the clock frequency of synchronous logic to throttle power consumption at periods of low computational demand. The voltage converter generates lower output voltages during periods of low computational performance requirements and higher output voltages during periods of high computational performance requirements. Implementation of integrated power conversion requires high-capacity energy storage devices, which are generally not available in traditional semiconductor processes. We achieve this with integration of thin-film magnetic materials into a conventional complementary metal-oxide-semiconductor (CMOS) process for high-quality on-chip power inductors. This project includes a body of work conducted to develop integrated switch-mode voltage regulators with thin-film magnetic power inductors. Soft-magnetic materials and inductor topologies are selected and optimized, with intent to maximize efficiency and current density of the integrated regulators. A custom integrated circuit (IC) is designed and fabricated in 45-nm CMOS silicon-on-insulator (SOI) to provide the control system and power-train necessary to drive the power inductors, in addition to providing a digital load for the converter. A silicon interposer is designed and fabricated in collaboration with IBM Research to integrate custom power inductors by chip stacking with the 45-nm CMOS integrated circuit, enabling power conversion with current density greater than 10A/mm2. The concepts and designs developed from this work enable significant improvements in performance-per-watt of future microprocessors in servers, desktops, and mobile devices. These new approaches to scaled voltage regulation for computing devices also promise significant impact on electricity consumption in the United States and abroad by improving the efficiency of all computational platforms. In 2006, servers and datacenters in the United States consumed an estimated 61 billion kWh or about 1.5% of the nation's total energy consumption. Federal Government servers and data centers alone accounted for about 10 billion kWh, for a total annual energy cost of about $450 million. Based upon market growth and efficiency trends, estimates place current server and datacenter power consumption at nearly 85 billion kWh in the US and at almost 280 billion kWh worldwide. Similar estimates place national desktop, mobile and portable computing at 80 billion kWh combined. While national electricity utilization for computation amounts to only 4% of current usage, it is growing at a rate of about 10% a year with volume servers representing one of the largest growth segments due to the increasing utilization of cloud-based services. The percentage of power that is consumed by the processor in a server varies but can be as much as 30% of the total power utilization, with an additional 50% associated with heat removal. The approaches considered here should allow energy efficiency gains as high as 30% in processors for all computing platforms, from high-end servers to smart phones, resulting in a direct annual energy savings of almost 15 billion kWh nationally, and 50 billion kWh globally. The work developed here is being commercialized by the start-up venture, Ferric Semiconductor, which has already secured two Phase I SBIR grants to bring these technologies to the marketplace.

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