Abstract

We introduce the use of majority voting circuits for increasing yield, reliability, and life cycle of VLSI processor arrays while reducing the overall area and manufacturing cost of the resultant defect and fault tolerant device. Usually, for a redundant fault tolerance, one redundant processing element is used for every faulty processing element. In our method, the majority voting circuits are used to combine defective/faulty processing elements into compensating failure groups such that fewer redundant processing elements are required for fault tolerance. By using these compensating failure groups, we artificially enhance the reliability of the processor array by tolerating more faults. In addition, yield and life cycle enhancements are higher than that of previously proposed approaches. We compare our results to actual VLSI processor array yield data.

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