Abstract

We present our early design exploration of reconfigurable Threshold Logic Gates (TLG) implemented using Silver-chalcogenide memristive devices combined with CMOS circuits. A variety of linearly separable logic functions including AND, OR, NAND, NOR have been realized in a Matlab-Simulink/Cadence co-simulation using a single-layer TLG. The functionality can be changed between these operations by reprogramming the resistance of the memristive devices.

Highlights

  • Moore’s Law helped the semiconductor industry increase the computational power of computers while shrinking their size and power consumption

  • In both cases the memristors were programmed to change the functionality of the Threshold Logic Gates (TLG) circuit alternately to AND, OR, NAND and NOR

  • We have developed a circuit design capable of realizing four different logic operations by changing the resistance of the memristive devices

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Summary

Introduction

Moore’s Law helped the semiconductor industry increase the computational power of computers while shrinking their size and power consumption This has enabled the development of many new commercial products, which enables changes in daily life as well as new research breakthroughs. Threshold logic gates (TLG) are an interesting candidate for logic implementation using hybrid memristive-CMOS circuits [3]. We present our early results on TLG design using Silver–Chalcogenide (Ag–Ch) memristive devices developed at. TLGs built with memristors can lead to changes in reconfigurable processing architectures. We present work in designing a circuit using memristors to implement a reprogrammable Threshold Logic.

Threshold Logic Gate Design
Memristive Devices
Circuit Realization
Memristive Device Characteristics
Simulations
Hardware
Experiments and Results
Conclusions
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