Reconfigurable performance measurement system-on-a-chip for baseband wireless algorithm design and verification

Abstract

Modern wireless technology applies several powerful but complex techniques - such as multiple-antenna systems, orthogonal frequency-division multiplexing, and capacity-approaching forward error correcting codes - to provide reliable broadband digital communications over the time-varying mobile radio channel. Such techniques appear in most recent wireless standards such as IEEE 802.11n Wi-Fi, IEEE 802.16 WiMax, and 3GPP LTE. Bit error rate simulation continues to be the workhorse design verification and performance optimization methodology; however, the growing complexity of modern wireless systems and the tendency of wireless standards to evolve even after product development has started have greatly increased the required simulation times to the extent that software-based simulation is now the major bottleneck in wireless system development. This article describes how baseband performance verification of wireless systems can be accelerated by over four orders of magnitude using compact, accurate, and high-throughput emulators implemented on reconfigurable field programmable gate arrays.