Reconfigurable Microarchitecture-Based PMDC Prototype Development for IoT Edge Computing Utilization

Abstract

in this article, a Reconfigurable Microarchi- tecture-based PMDC prototype is developed with the help of dynamic pipeline stages. The Reconfigurable Microarchitecture is intended for the Internet of Things (IoT) edge level computing utilization purposes. This microarchitecture is implemented using a reconfigurable computing system with the help of an FPGA board. The reconfigurable microarchitecture is used as a feedback circuit of the PMDC motor to come out with a developed speed control prototype that can be sufficiently integrated with IoT technology. The number of pipeline stages will dynamically change as per user speed requirements. Several methods of speed measurement are tested using different pipeline structures to find out an appropriate method for the IoT edge level. Resource utilization, throughput and latency for those methods are analyzed. Additionally, the reconfigurable microarchitecture gives dynamic power consumption which more suitable for IoT edge level computations. The Real-Time behavior of the developed prototype is carried out with a pseudo-random binary sequence (PRBS) test for its system identification, a particle swarm optimization (PSO) technique for its optimal controller design and edge level computations for its IoT integration procedure.