Reconfigurable Computing: Peripheral Power and Area Optimization Techniques

Abstract

This paper examines techniques to achieve power, area and configuration storage reductions in the peripherals of a reconfigurable computing system. The two techniques chosen are the propagation of constants to the peripheral core and the modification of the finite state machine (FSM) to reduce switching activity. The constant propagation technique is based on the observation that configuration of peripheral devices is generally set only once during the lifetime of the device. Since the peripheral is running only a single function, the control registers now become redundant, as there is only one input for each of the registers. Removing this eliminates much of the redundant control registers and routines. FSM modification is based on the observation that signal transitions consume power. To reduce the power, the state representations in the FSM are replaced by Gray Code. Gray code only changes one bit at a time, hence, power consumption can be reduced. Results show a reduction in area and configuration storage of up to 20% and a power reduction of up to 7%.