Abstract

RECONFIGURABLE devices, a representative of which is field programmable gate array (FPGA), are picking up their notoriety as a method for the integrated system implementation since the nonrecurring designing expense of use Application specific integrated circuits (ASICs) is raising as the fabrication technology becomes finer and finer. In the existing system, The architecture utilizes the FEoL layers for a fine-grained look into coarse-grained number arithmetic/memory units for up execution and similarity with shifted applications. A contextual analysis of use mapping demonstrates the proposed design can decrease the array region by 21.7%. In the proposed system, a MEMS based resistivity variable Memory architecture is developed in which the tunable Index utilizes the speed of accessing the memory units very fast and can be varied by tuning the digital inputs of the FPGA. The application to be developed here is the development of Hardware based memristor circuit and Memory design in FPGA. By using this we can decrease Area and power consumption.

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