Abstract

Advances in IC devices and technologies drive the need for innovation in design and implementation techniques for signal processing systems. Emerging signal processing algorithms place large demands on processing complexity, which must be met under strict area and power limits. To meet these challenges, more efficient algorithms and architectures are needed. This special issue contains a selection of papers on recent advances in the design and implementation of signal processing systems in the areas of wireless communications, phasechange memory, real-time vision, and error-correcting codes. In GPU Acceleration of a Configurable N-Way MIMO Detector for Wireless Systems Wu, Yin, Wang, Studer, and Cavallaro present an N-way MIMO detector for addressing the computational complexity of conventional detectors. Their implementations on practical GPUs highlight opportunities for parallelism, which in turn enable scalability in the detector algorithms, making energy and performance tradeoffs readily accessible . Even with the configurabi l i ty, their implementations outperform typical GPU-based MIMO detectors. In DIFFS: A Low Power, Multi-mode, Multi-standard Flexible Digital Front-end for Sensing in Future Cognitive Radios, Chiumento, Hollevoet, Pollin, Naessens, Dejonghe, and Van der Perre present the idea of a configurable digital front-end, capable of performing efficient spectrum sensing and synchronization to selectively trigger digital baseband functions in future cognitive radios. The authors propose a design that can support multiple modes and standards (LTE, WLAN, DVB-T), and they demonstrate an implementation in a custom IC in 65 nm CMOS. In Energy-adaptive Pulse Amplitude Modulation for IRUWB Communications under Renewable Energy, Zhao, Chen, and Wang present an energy adaptive Pulse Amplitude Modulation technique for self-powered Impulse Radio Ultra-wideband (IR-UWB) communication systems. By jointly exploiting the wireless channel conditions and the non-deterministic characteristics of renewable energy sources, the proposed technique can effectively improve the communication system data rate and/or time coverage. Yang, Emre, Xu, Chen, Cao, and Chakrabarti present a cost-effective solution for improving the reliability of multibit per cell phase change RAM (PRAM) in A Low Cost MultiTiered Approach To Improving The Reliability Of Multi-Level Cell PRAM. Error models are first developed to accurately capture hard and soft errors in multi-bit per cell PRAM, based upon which a variety design techniques across circuit, architecture, and system are developed to improve the data storage reliability at minimal speed, silicon, and energy overhead. The effectiveness is well demonstrated through comprehensive evaluations. In Accelerating Multiresolution Gabor Feature Extraction for Real Time Vision Applications Cho, Chandramoorthy, W. J. Gross (*) Department of Electrical and Computer Engineering, McGill University, Montreal, Quebec, Canada e-mail: warren.gross@mcgill.ca

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.